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NXP Semiconductors /LPC18xx /UART1 /THR

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Interpret as THR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0THR0RESERVED

Description

Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)

Fields

THR

Transmit Holding Register. Writing to the UART1 Transmit Holding Register causes the data to be stored in the UART1 transmit FIFO. The byte will be sent when it reaches the bottom of the FIFO and the transmitter is available.
RESERVED

Reserved, user software should not write ones to reserved bits.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data